The via etch procedures commonly used in semiconductor processing, and especially in back-end-of-line (BEOL) processing of semiconductor devices, typically results in the formation of processing residues. These residues are often organometallic and polymeric in nature, and have elemental compositions that may include C, O, F, Si, Cu, H, and N. These residues tend to accumulate on the bottom and sidewalls of vias, where their presence gives rise to a number of problems such as low device yield, high via resistance, via voids, and reliability concerns.
Many attempts have been made in the art to remove these processing residues from vias through the use of various cleaning formulations, so that the aforementioned problems will not be encountered. However, such cleaning formulations frequently cause complications of their own. For example, strong organic solvents such as hydroxylamine (HDA) have often been used to remove these residues, but the use of such solvents is expensive, hazardous, environmentally unfriendly, and often requires processing times that are longer than desired. Moreover, most solvent systems based on a single solvent or a small number of solvents are ineffective at removing all components of such residues from vias, given the complex chemistry of these residues.
Complex, multi-component solvent systems have also been developed for use as cleaning formulations that are targeted at the particular processing residues formed in specific fabrication lines. However, these complex systems are very expensive to develop and produce, and must be re-engineered to account for any changes in the fabrication process. Moreover, cleaning formulations of this type are also frequently detrimental to the metal and dielectric components of the device being treated. Consequently, their use may result in the same types of yield loss and poor electrical performance attributable to the presence of the residues themselves.
The use of cleaning formulations based on semi-aqueous chemistries, such as those based on NH4F or dilute solutions of HF (often referred to as DHF), is also known. However, these chemistries are not effective at removing all processing residues or components thereof from vias. Moreover, chemistries of this type tend to corrode underlying metal layers and to undercut barrier layers, thus resulting in undesirable dielectric lift-off.
The above-noted infirmities in existing cleaning formulations have been exacerbated by the continuing movement toward reduced chip sizes. In particular, as chip sizes become increasingly small, the presence of processing residues in the vias of these chips results in larger yield losses and greater reductions in device performance. Moreover, reduced chip sizes have necessitated the use of low K structures (that is, structures with bulk dielectric constants (K) below 3.0) as a result of the need to more tightly control conductor pathways. However, conventional cleaning formulations of the type noted above are not suitable for use on low-K structures because they tend to increase the K values of these structures, thereby compromising device performance.
There is thus a need in the art for cleaning formulations that are effective at removing processing residues from vias, such as those commonly formed during the etch procedures used in BEOL processing. There is further a need in the art for cleaning formulations that can be used with low-K structures without detrimentally affecting the K values or constituent layers of these structures. These and other needs are met by the compositions and methodologies as hereinafter described.